#include <stdio.h>

void f_signed(int a, int b)
{
	if (a > b)
			printf("a>b\n");
	if (a == b)
			printf("a==b\n");
	if (a < b)
			printf("a<b\n");
}

void f_unsigned(unsigned int a, unsigned int b)
{
	if (a > b)
			printf("a>b\n");
	if (a == b)
			printf("a==b\n");
	if (a < b)
			printf("a<b\n");
}

int main()
{
	f_signed(1, 2);
	f_unsigned(1, 2);

	return 0;
}


#if 0

/*
 * x86
 */
	JLE, "Jump if Less or Equal".

	如果上一条CMP指令的第一个操作表达式小于或等于(不大于)第二个表达式，JLE将跳转到指令所标明的地址；
	如果不满足上述条件，则运行下一条指令。

	JNE，"Jump if Not Equal".

	如果上一条CMP的两个操作符不相等，则进行相应跳转。
	
	JGE，"Jump if Greater of Equal".
	
	如果CMP的第一个表达式大于或等于第二个表达式(不小于)，则进行跳转。

/*
 * gcc
 */
	JBE (jump if Below or Equal, 相当于JLE) 和 JAE (Jump if Above or Equal, 相当于JGE)。

	JA/JAE/JB/JBE 与 JG/JGE/JL/JLE 的区别？
	在于它们检查的标志位不同: 前者检查借/进位标志位CF(1意味着小于) 和零标志位ZF(1意味着相等)，后者检查"SF XOR OF" (1意味着异号)
	和ZF。前者适用于unsigned类型数据的(CMP)运算，而后者的适用于signed类型数据的运算。

/*
 * arm
 */
	ARM模式的程序可以完全不依赖条件转移指令。
	
	这样做有什么优点呢？依赖精简指令集(RISC)的arm处理器采用流水线技术(pipeline)。简单地说，这种处理器在跳转指令方面的性能不怎么
	优越，所以它们的分支预测处理器(branch predictor unites)决定了整体的性能。对于采用流水线技术的处理器来说，运行其上的程序跳转
	次数越少(无论是条件转移还是无条件转移)，程序的性能就越高。条件执行指令，会受益于其跳跃次数最少的优点，体现出最高的效率。

	x86指令集里只有CMOVcc指令，没有其他的条件执行指令了。CMOVcc指令是仅在特定标志位为1(通常由CMP设置)的情况下才会执行MOV操作的
	条件执行指令。

	BLE (Less than or Equal)
	BNE (Not Equal)
	BGE (Greater than or Equal)
	BLS (Unsigned Lower or Same)
	BCS (Carry Set(Greater than or equal))

#endif

#if 0
/*
 * intel
 */
0000000000001149 <f_signed>:
    1149:	f3 0f 1e fa          	endbr64 
    114d:	55                   	push   %rbp
    114e:	48 89 e5             	mov    %rsp,%rbp
    1151:	48 83 ec 10          	sub    $0x10,%rsp
    1155:	89 7d fc             	mov    %edi,-0x4(%rbp)
    1158:	89 75 f8             	mov    %esi,-0x8(%rbp)
    115b:	8b 45 fc             	mov    -0x4(%rbp),%eax
    115e:	3b 45 f8             	cmp    -0x8(%rbp),%eax
    1161:	7e 0c                	jle    116f <f_signed+0x26>
    1163:	48 8d 3d 9a 0e 00 00 	lea    0xe9a(%rip),%rdi        # 2004 <_IO_stdin_used+0x4>
    116a:	e8 e1 fe ff ff       	callq  1050 <puts@plt>
    116f:	8b 45 fc             	mov    -0x4(%rbp),%eax
    1172:	3b 45 f8             	cmp    -0x8(%rbp),%eax
    1175:	75 0c                	jne    1183 <f_signed+0x3a>
    1177:	48 8d 3d 8a 0e 00 00 	lea    0xe8a(%rip),%rdi        # 2008 <_IO_stdin_used+0x8>
    117e:	e8 cd fe ff ff       	callq  1050 <puts@plt>
    1183:	8b 45 fc             	mov    -0x4(%rbp),%eax
    1186:	3b 45 f8             	cmp    -0x8(%rbp),%eax
    1189:	7d 0c                	jge    1197 <f_signed+0x4e>
    118b:	48 8d 3d 7b 0e 00 00 	lea    0xe7b(%rip),%rdi        # 200d <_IO_stdin_used+0xd>
    1192:	e8 b9 fe ff ff       	callq  1050 <puts@plt>
    1197:	90                   	nop
    1198:	c9                   	leaveq 
    1199:	c3                   	retq   

000000000000119a <f_unsigned>:
    119a:	f3 0f 1e fa          	endbr64 
    119e:	55                   	push   %rbp
    119f:	48 89 e5             	mov    %rsp,%rbp
    11a2:	48 83 ec 10          	sub    $0x10,%rsp
    11a6:	89 7d fc             	mov    %edi,-0x4(%rbp)
    11a9:	89 75 f8             	mov    %esi,-0x8(%rbp)
    11ac:	8b 45 fc             	mov    -0x4(%rbp),%eax
    11af:	3b 45 f8             	cmp    -0x8(%rbp),%eax
    11b2:	76 0c                	jbe    11c0 <f_unsigned+0x26>
    11b4:	48 8d 3d 49 0e 00 00 	lea    0xe49(%rip),%rdi        # 2004 <_IO_stdin_used+0x4>
    11bb:	e8 90 fe ff ff       	callq  1050 <puts@plt>
    11c0:	8b 45 fc             	mov    -0x4(%rbp),%eax
    11c3:	3b 45 f8             	cmp    -0x8(%rbp),%eax
    11c6:	75 0c                	jne    11d4 <f_unsigned+0x3a>
    11c8:	48 8d 3d 39 0e 00 00 	lea    0xe39(%rip),%rdi        # 2008 <_IO_stdin_used+0x8>
    11cf:	e8 7c fe ff ff       	callq  1050 <puts@plt>
    11d4:	8b 45 fc             	mov    -0x4(%rbp),%eax
    11d7:	3b 45 f8             	cmp    -0x8(%rbp),%eax
    11da:	73 0c                	jae    11e8 <f_unsigned+0x4e>
    11dc:	48 8d 3d 2a 0e 00 00 	lea    0xe2a(%rip),%rdi        # 200d <_IO_stdin_used+0xd>
    11e3:	e8 68 fe ff ff       	callq  1050 <puts@plt>
    11e8:	90                   	nop
    11e9:	c9                   	leaveq 
    11ea:	c3                   	retq   

00000000000011eb <main>:
    11eb:	f3 0f 1e fa          	endbr64 
    11ef:	55                   	push   %rbp
    11f0:	48 89 e5             	mov    %rsp,%rbp
    11f3:	be 02 00 00 00       	mov    $0x2,%esi
    11f8:	bf 01 00 00 00       	mov    $0x1,%edi
    11fd:	e8 47 ff ff ff       	callq  1149 <f_signed>
    1202:	be 02 00 00 00       	mov    $0x2,%esi
    1207:	bf 01 00 00 00       	mov    $0x1,%edi
    120c:	e8 89 ff ff ff       	callq  119a <f_unsigned>
    1211:	b8 00 00 00 00       	mov    $0x0,%eax
    1216:	5d                   	pop    %rbp
    1217:	c3                   	retq   
    1218:	0f 1f 84 00 00 00 00 	nopl   0x0(%rax,%rax,1)
    121f:	00 

/*
 * arm
 */
000000000040055c <f_signed>:
  40055c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400560:	910003fd 	mov	x29, sp
  400564:	b9001fa0 	str	w0, [x29, #28]
  400568:	b9001ba1 	str	w1, [x29, #24]
  40056c:	b9401fa1 	ldr	w1, [x29, #28]
  400570:	b9401ba0 	ldr	w0, [x29, #24]
  400574:	6b00003f 	cmp	w1, w0
  400578:	5400008d 	b.le	400588 <f_signed+0x2c>
  40057c:	90000000 	adrp	x0, 400000 <_init-0x3e8>
  400580:	911c6000 	add	x0, x0, #0x718
  400584:	97ffffb3 	bl	400450 <puts@plt>
  400588:	b9401fa1 	ldr	w1, [x29, #28]
  40058c:	b9401ba0 	ldr	w0, [x29, #24]
  400590:	6b00003f 	cmp	w1, w0
  400594:	54000081 	b.ne	4005a4 <f_signed+0x48>  // b.any
  400598:	90000000 	adrp	x0, 400000 <_init-0x3e8>
  40059c:	911c8000 	add	x0, x0, #0x720
  4005a0:	97ffffac 	bl	400450 <puts@plt>
  4005a4:	b9401fa1 	ldr	w1, [x29, #28]
  4005a8:	b9401ba0 	ldr	w0, [x29, #24]
  4005ac:	6b00003f 	cmp	w1, w0
  4005b0:	5400008a 	b.ge	4005c0 <f_signed+0x64>  // b.tcont
  4005b4:	90000000 	adrp	x0, 400000 <_init-0x3e8>
  4005b8:	911ca000 	add	x0, x0, #0x728
  4005bc:	97ffffa5 	bl	400450 <puts@plt>
  4005c0:	d503201f 	nop
  4005c4:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005c8:	d65f03c0 	ret

00000000004005cc <f_unsigned>:
  4005cc:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005d0:	910003fd 	mov	x29, sp
  4005d4:	b9001fa0 	str	w0, [x29, #28]
  4005d8:	b9001ba1 	str	w1, [x29, #24]
  4005dc:	b9401fa1 	ldr	w1, [x29, #28]
  4005e0:	b9401ba0 	ldr	w0, [x29, #24]
  4005e4:	6b00003f 	cmp	w1, w0
  4005e8:	54000089 	b.ls	4005f8 <f_unsigned+0x2c>  // b.plast
  4005ec:	90000000 	adrp	x0, 400000 <_init-0x3e8>
  4005f0:	911c6000 	add	x0, x0, #0x718
  4005f4:	97ffff97 	bl	400450 <puts@plt>
  4005f8:	b9401fa1 	ldr	w1, [x29, #28]
  4005fc:	b9401ba0 	ldr	w0, [x29, #24]
  400600:	6b00003f 	cmp	w1, w0
  400604:	54000081 	b.ne	400614 <f_unsigned+0x48>  // b.any
  400608:	90000000 	adrp	x0, 400000 <_init-0x3e8>
  40060c:	911c8000 	add	x0, x0, #0x720
  400610:	97ffff90 	bl	400450 <puts@plt>
  400614:	b9401fa1 	ldr	w1, [x29, #28]
  400618:	b9401ba0 	ldr	w0, [x29, #24]
  40061c:	6b00003f 	cmp	w1, w0
  400620:	54000082 	b.cs	400630 <f_unsigned+0x64>  // b.hs, b.nlast
  400624:	90000000 	adrp	x0, 400000 <_init-0x3e8>
  400628:	911ca000 	add	x0, x0, #0x728
  40062c:	97ffff89 	bl	400450 <puts@plt>
  400630:	d503201f 	nop
  400634:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400638:	d65f03c0 	ret

000000000040063c <main>:
  40063c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400640:	910003fd 	mov	x29, sp
  400644:	52800041 	mov	w1, #0x2                   	// #2
  400648:	52800020 	mov	w0, #0x1                   	// #1
  40064c:	97ffffc4 	bl	40055c <f_signed>
  400650:	52800041 	mov	w1, #0x2                   	// #2
  400654:	52800020 	mov	w0, #0x1                   	// #1
  400658:	97ffffdd 	bl	4005cc <f_unsigned>
  40065c:	52800000 	mov	w0, #0x0                   	// #0
  400660:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400664:	d65f03c0 	ret


#endif

